Skip to content

Trending

See what the GitHub community is most excited about today.

  1. A directory of Western Digital’s RISC-V SweRV Cores

    SystemVerilog 627 72 Built by @aprnath @parthpower @0xflotus @manegspb @wsnyder
  2. Ariane is a 6-stage RISC-V CPU capable of booting Linux

    SystemVerilog 413 65 Built by @zarubaf @msfschaffner @stmach @jrrk @Moschn
  3. The root repo for lowRISC project and FPGA demos.

    SystemVerilog 358 78 Built by @wsong83 @jrrk @wallento @furkanturan @luismarques
  4. An exploration of log domain "alternative floating point" for hardware ML/AI accelerators.

    SystemVerilog 273 22 Built by @wickedfoo
  5. A Verilog synthesis flow for Minecraft redstone circuits

    SystemVerilog 179 4 Built by @itsFrank @Omar-Bamashmos @orta
  6. SCR1 is a high-quality open-source RISC-V MCU core in Verilog

    SystemVerilog 177 42 Built by @dp-sc @ar-sc
  7. RISCY is an in-order 4-stage RISC-V RV32IMFCXpulp CPU

    SystemVerilog 170 74 Built by @atraber @svenstucki @davideschiavone @gautschimi @FrancescoConti
  8. RISC-V CPU Core

    SystemVerilog 116 22 Built by @rherveille @sphardy @frantony
  9. Spatial: "Specify Parameterized Accelerators Through Inordinately Abstract Language"

    SystemVerilog 113 9 Built by @mattfel1 @dkoeplin @yaqiz01 @jcamach2 @pyprogrammer
  10. Contains the code examples from The UVM Primer Book sorted by chapters.

    SystemVerilog 108 59 Built by @rdsalemi @raysalemi
  11. training labs and examples

    SystemVerilog 105 73 Built by @mramdas @mayur13
  12. CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

    SystemVerilog 69 14 Built by @tymonx @gitter-badger @Velik123
  13. This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

    SystemVerilog 62 19 Built by @haugoug @FrancescoConti @davideschiavone @politicante @omerfirmak
  14. Reference examples and short projects using UVM Methodology

    SystemVerilog 58 64 Built by @mramdas @robingarg89 @mayur13
  15. Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs

    SystemVerilog 57 12 Built by @michael-adler @nakulkorde @luebbers @rahulrs
  16. Ultimate multigame cartridge for Nintendo Famicom

    SystemVerilog 57 14 Built by @ClusterM
  17. This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

    SystemVerilog 49 19 Built by @haugoug @anga93 @davideschiavone @politicante @FrancescoConti
  18. Source code repo for UVM Tutorial for Candy Lovers

    SystemVerilog 48 33 Built by @cluelogic
  19. Verilog code for a simple synth module; developed on TinyFPGA BX

    SystemVerilog 43 3 Built by @gundy @lawrie
  20. SystemVerilog 43 12 Built by @taoliug @scottj97 @mgielda
  21. SystemVerilog 42 29 Built by @Atokulus @atraber @svenstucki @davideschiavone @FrancescoConti
  22. SystemVerilog 41 18 Built by @nosnhojn @jesseprusi @B00Ze @tudortimi @daveread4
  23. Tutorials, scripts and reference designs for the Intel FPGA partial reconfiguration (PR) design flow

    SystemVerilog 40 19 Built by @kbrunham-intel @ycai-intel @fjavaher
  24. a playground for xilinx zynq fpga experiments

    SystemVerilog 39 6 Built by @swetland @travisg
  25. Hardware of sampling model

    SystemVerilog 39 43 Built by @MatrixAINetworkMan
Other: SystemVerilog
Other Languages
1C Enterprise ABAP ABNF ActionScript Ada Adobe Font Metrics Agda AGS Script Alloy Alpine Abuild AMPL AngelScript Ant Build System ANTLR ApacheConf Apex API Blueprint APL Apollo Guidance Computer AppleScript Arc AsciiDoc ASN.1 ASP AspectJ Assembly Asymptote ATS Augeas AutoHotkey AutoIt Awk Ballerina Batchfile Befunge Bison BitBake Blade BlitzBasic BlitzMax Bluespec Boo Brainfuck Brightscript Bro C C# C++ C-ObjDump C2hs Haskell Cap'n Proto CartoCSS Ceylon Chapel Charity ChucK Cirru Clarion Clean Click CLIPS Clojure Closure Templates Cloud Firestore Security Rules CMake COBOL CoffeeScript ColdFusion ColdFusion CFC COLLADA Common Lisp Common Workflow Language Component Pascal CoNLL-U Cool Coq Cpp-ObjDump Creole Crystal CSON Csound Csound Document Csound Score CSS CSV Cuda CWeb Cycript Cython D D-ObjDump Darcs Patch Dart DataWeave desktop Diff DIGITAL Command Language DM DNS Zone Dockerfile Dogescript DTrace Dylan E Eagle Easybuild EBNF eC Ecere Projects ECL ECLiPSe Edje Data Collection edn Eiffel EJS Elixir Elm Emacs Lisp EmberScript EML EQ Erlang F# F* Factor Fancy Fantom FIGlet Font Filebench WML Filterscript fish FLUX Formatted Forth Fortran FreeMarker Frege G-code Game Maker Language GAMS GAP GCC Machine Description GDB GDScript Genie Genshi Gentoo Ebuild Gentoo Eclass Gerber Image Gettext Catalog Gherkin GLSL Glyph Glyph Bitmap Distribution Format GN Gnuplot Go Golo Gosu Grace Gradle Grammatical Framework Graph Modeling Language GraphQL Graphviz (DOT) Groovy Groovy Server Pages Hack Haml Handlebars HAProxy Harbour Haskell Haxe HCL HiveQL HLSL HTML HTML+Django HTML+ECR HTML+EEX HTML+ERB HTML+PHP HTML+Razor HTTP HXML Hy HyPhy IDL Idris IGOR Pro Inform 7 INI Inno Setup Io Ioke IRC log Isabelle Isabelle ROOT J Jasmin Java Java Properties Java Server Pages JavaScript JFlex Jison Jison Lex Jolie JSON JSON with Comments JSON5 JSONiq JSONLD Jsonnet JSX Julia Jupyter Notebook KiCad Layout KiCad Legacy Layout KiCad Schematic Kit Kotlin KRL LabVIEW Lasso Latte Lean Less Lex LFE LilyPond Limbo Linker Script Linux Kernel Module Liquid Literate Agda Literate CoffeeScript Literate Haskell LiveScript LLVM Logos Logtalk LOLCODE LookML LoomScript LSL Lua M M4 M4Sugar Makefile Mako Markdown Marko Mask Mathematica MATLAB Maven POM Max MAXScript mcfunction MediaWiki Mercury Meson Metal MiniD Mirah Modelica Modula-2 Modula-3 Module Management System Monkey Moocode MoonScript MQL4 MQL5 MTML MUF mupad Myghty NCL Nearley Nemerle nesC NetLinx NetLinx+ERB NetLogo NewLisp Nextflow Nginx Nim Ninja Nit Nix NL NSIS Nu NumPy ObjDump Objective-C Objective-C++ Objective-J OCaml Omgrofl ooc Opa Opal OpenCL OpenEdge ABL OpenRC runscript OpenSCAD OpenType Feature File Org Ox Oxygene Oz P4 Pan Papyrus Parrot Parrot Assembly Parrot Internal Representation Pascal Pawn Pep8 Perl Perl 6 PHP Pic Pickle PicoLisp PigLatin Pike PLpgSQL PLSQL Pod Pod 6 PogoScript Pony PostCSS PostScript POV-Ray SDL PowerBuilder PowerShell Processing Prolog Propeller Spin Protocol Buffer Public Key Pug Puppet Pure Data PureBasic PureScript Python Python console Python traceback q QMake QML Quake R Racket Ragel RAML Rascal Raw token data RDoc REALbasic Reason Rebol Red Redcode Regular Expression Ren'Py RenderScript reStructuredText REXX RHTML Rich Text Format Ring RMarkdown RobotFramework Roff Rouge RPC RPM Spec Ruby RUNOFF Rust Sage SaltStack SAS Sass Scala Scaml Scheme Scilab SCSS sed Self ShaderLab Shell ShellSession Shen Slash Slice Slim Smali Smalltalk Smarty SMT Solidity SourcePawn SPARQL Spline Font Database SQF SQL SQLPL Squirrel SRecode Template Stan Standard ML Stata STON Stylus SubRip Text SugarSS SuperCollider SVG Swift SystemVerilog Tcl Tcsh Tea Terra TeX Text Textile Thrift TI Program TLA TOML Turing Turtle Twig TXL Type Language TypeScript Unified Parallel C Unity3D Asset Unix Assembly Uno UnrealScript UrWeb Vala VCL Verilog VHDL Vim script Visual Basic Volt Vue Wavefront Material Wavefront Object wdl Web Ontology Language WebAssembly WebIDL Windows Registry Entries wisp World of Warcraft Addon Data X BitMap X Font Directory Index X PixMap X10 xBase XC XCompose XML Xojo XPages XProc XQuery XS XSLT Xtend Yacc YAML YANG YARA YASnippet Zephir Zig Zimpl
ProTip! Looking for recently updated SystemVerilog repositories? Try this search
You can’t perform that action at this time.
You signed in with another tab or window. Reload to refresh your session. You signed out in another tab or window. Reload to refresh your session.