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  1. A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able p…

    VHDL 840 422 Built by @fpgaminer @IAmNotDorian @teknohog @progranism @makomk
  2. Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

    VHDL 778 274 Built by @kristopk @AWSGH @AWSwinefred @AWSNB @AWSaalluri
  3. A work-in-progress for what is to be a software-free web server for static content.

    VHDL 724 33 Built by @hamsternz @JackAWatt
  4. VHDL 2008/93/87 simulator

    VHDL 712 131 Built by @tgingold @gingold-adacore @Paebbels @1138-4EB @Brian-Drummond
  5. GPL v3 2D/3D graphics engine in verilog

    VHDL 449 93 Built by @asicguy
  6. Community created parallella projects

    VHDL 369 142 Built by @olajep @aolofsson @wizard97 @9600 @DonQuichotteComputers
  7. Parallella board design files

    VHDL 369 171 Built by @aolofsson @avivbur @olofk @oz-shmueli
  8. VUnit is a unit testing framework for VHDL/SystemVerilog

    VHDL 290 106 Built by @kraigher @LarsAsplund @slaweksiluk @umarcor @1138-4EB
  9. VHDL compiler and simulator

    VHDL 283 46 Built by @nickg @hiyuh @mitchsm @peteut @kraigher
  10. GameCube Digital AV converter

    VHDL 262 43 Built by @ikorb @thekevbot
  11. Core sources and tools for the MIST board

    VHDL 256 51 Built by @harbaum @gyurco @renaudhelias @wsoltys @sebdel
  12. IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

    VHDL 246 59 Built by @Paebbels @preusser @mzabeltud @cjchin @FranzForstmayr
  13. A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

    VHDL 234 72 Built by @gornjas @emard @goran-mahovlic @XarkLabs @ojura
  14. Arduino MIPI DSI Shield

    VHDL 223 69 Built by @twlostow
  15. RISC-V by VectorBlox

    VHDL 215 47 Built by @vanjoe @vbx-aseverance @rdeiaco @prashantrar @sevgicorumlu
  16. Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer

    VHDL 193 27 Built by @gtaylormb @stohrendorf
  17. A Forth CPU and System on a Chip, based on the J1, written in VHDL

    VHDL 153 10 Built by @howerj
  18. An implementation of DisplayPort protocol for FPGAs

    VHDL 149 24 Built by @hamsternz @pwolf23
  19. A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able p…

    VHDL 149 422 Built by @fpgaminer @IAmNotDorian @teknohog @progranism @makomk
  20. Open Source 4k CSI-2 Rx core for Xilinx FPGAs

    VHDL 145 45 Built by @daveshah1 @olofk
  21. Space Invaders game implemented with VHDL

    VHDL 131 14 Built by @fabioperez
  22. Public repository for PicoEVB (Xilinx Artix XC7A50T based)

    VHDL 119 24 Built by @RHSResearchLLC @joshrsmith
  23. A simple RISC-V processor for use in FPGA designs.

    VHDL 113 17 Built by @skordal @siorpaes
  24. Open Source VHDL Verification Library and Methodology - for very efficient VHDL verification of FPGA and ASIC - resulting also in a significant quality improvement

    VHDL 98 39 Built by @UVVM @arildreiersen @Bitvis @Aaron-Hartwig @danielblomkvistbitvis
  25. Original hand-coded firmware for the HDMI2USB - HDMI/DVI Capture - project

    VHDL 97 24 Built by @mithro @shenki @ajitmathew @makestuff @jahanzeb
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