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  1. A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able p…

    VHDL 823 416 Built by @fpgaminer @IAmNotDorian @teknohog @progranism @makomk
  2. Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

    VHDL 731 260 Built by @kristopk @AWSGH @AWSwinefred @AWSNB @AWSaalluri
  3. A work-in-progress for what is to be a software-free web server for static content.

    VHDL 718 31 Built by @hamsternz @JackAWatt
  4. VHDL 2008/93/87 simulator

    VHDL 661 121 Built by @tgingold @gingold-adacore @Paebbels @1138-4EB @Brian-Drummond
  5. GPL v3 2D/3D graphics engine in verilog

    VHDL 421 83 Built by @asicguy
  6. Parallella board design files

    VHDL 365 167 Built by @aolofsson @avivbur @olofk @oz-shmueli
  7. Community created parallella projects

    VHDL 363 137 Built by @olajep @aolofsson @wizard97 @9600 @DonQuichotteComputers
  8. VUnit is a unit testing framework for VHDL/SystemVerilog

    VHDL 279 104 Built by @kraigher @LarsAsplund @slaweksiluk @1138-4EB @joshrsmith
  9. GameCube Digital AV converter

    VHDL 252 44 Built by @ikorb @thekevbot
  10. Core sources and tools for the MIST board

    VHDL 247 46 Built by @harbaum @gyurco @renaudhelias @wsoltys @sebdel
  11. IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

    VHDL 233 55 Built by @Paebbels @preusser @mzabeltud @cjchin @FranzForstmayr
  12. A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

    VHDL 218 71 Built by @gornjas @emard @goran-mahovlic @XarkLabs @ojura
  13. Arduino MIPI DSI Shield

    VHDL 215 65 Built by @twlostow
  14. RISC-V by VectorBlox

    VHDL 206 46 Built by @vanjoe @rdeiaco @vbx-aseverance @prashantrar
  15. Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer

    VHDL 186 26 Built by @gtaylormb @stohrendorf
  16. A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able p…

    VHDL 146 416 Built by @fpgaminer @IAmNotDorian @teknohog @progranism @makomk
  17. An implementation of DisplayPort protocol for FPGAs

    VHDL 143 22 Built by @hamsternz @pwolf23
  18. Open Source 4k CSI-2 Rx core for Xilinx FPGAs

    VHDL 133 41 Built by @daveshah1 @olofk
  19. Space Invaders game implemented with VHDL

    VHDL 127 14 Built by @fabioperez
  20. Public repository for PicoEVB (Xilinx Artix XC7A50T based)

    VHDL 110 22 Built by @RHSResearchLLC @joshrsmith
  21. A simple RISC-V processor for use in FPGA designs.

    VHDL 106 15 Built by @skordal @siorpaes
  22. Original hand-coded firmware for the HDMI2USB - HDMI/DVI Capture - project

    VHDL 95 25 Built by @mithro @shenki @ajitmathew @makestuff @jahanzeb
  23. FPGA-based HDMI ambient lighting

    VHDL 94 22 Built by @drxzcl
  24. The Zylin ZPU

    VHDL 91 24 Built by @bert-lange @oharboe @alvieboy
  25. Open Source VHDL Verification Library and Methodology - for very efficient VHDL verification of FPGA and ASIC - resulting also in a significant quality improvement

    VHDL 89 38 Built by @UVVM @arildreiersen @Bitvis @Aaron-Hartwig @danielblomkvistbitvis
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